1. Field of the Invention
The present invention relates to an output impedance adjustment circuit for adjusting an output impedance of an output circuit even when process, temperature or supply voltage fluctuates in a semiconductor device, and particularly relates to a semiconductor device configured so that an operation test for the output circuit can be performed according to a predetermined test condition in a test of the semiconductor device.
2. Description of the Related Art
In recent years, there has been a demand for high-speed data transfer in semiconductor devices. Hence, a problem has arisen that signal reflection occurs at, for example, a connection point between a semiconductor device and a bus, thereby degrading signal quality. Accordingly, there is a requirement for a function to suppress the signal reflection by maintaining an output impedance value of an output circuit of the semiconductor device at a constant reference resistance. Conventionally, there has been used an output impedance adjustment circuit for automatically adjusting the output impedance of the output circuit of the semiconductor device to a predetermined standard value (see, for example, Japanese Patent Laid-Open No. 2002-232286 and Japanese Patent Laid-Open No. 2006-203405). As shown in FIG. 10, the conventional output impedance adjustment circuit includes a replica circuit unit 101, a comparator unit 102, a counter control unit 103 and a selector unit 104, and there is provided an output circuit unit 105 whose output impedance is controlled.
In FIG. 10, the replica circuit unit 101 includes a circuit portion having the same configuration as the output circuit unit 105 and generates a control voltage which varies depending on the output impedance of the circuit portion. The comparator unit 102 compares the control voltage output from the replica circuit unit 101 with a reference voltage, and outputs a binary internal counter control signal SS which varies according to a magnitude relation between these voltages. The counter control unit 103 controls operation of a counter 110, which is an up/down counter having a predetermined number of bits, on the basis of the internal counter control signal SS from the comparator unit 102. Thus, the count value of the counter 110 is output as an adjustment code C. The selector unit 104 performs selective switching control between the adjustment code C from the counter 110 and a test code T from outside, and outputs the selected code to the output circuit unit 105 and the replica circuit unit 101. The output circuit unit 105 is composed of a plurality of parallel-connected MOS transistors, and is controlled to be on/off according to the adjustment code C or the test code T, thereby causing the output impedance of the output circuit unit 105 to change. The output node ND of the output circuit unit 105 is connected to a subsequent circuit.
By employing the above-described output impedance adjustment circuit, the adjustment code C is automatically adjusted to an appropriate value by the comparator unit 102 and the counter control unit 103 through feedback to the replica circuit unit 101, even in a case where the output impedance of the output circuit unit 105 varies due to temperature or supply voltage variations. Consequently, by periodically performing the automatic adjustment during normal operation using the output impedance adjustment circuit, it is possible to control the output circuit unit 105 so that the output impedance thereof is maintained at the standard value.
In a test of the semiconductor device, an operation test needs to be performed by intentionally deviating the output impedance of the output circuit unit 105 from the standard value. When performing such an operation test, control is performed so that an arbitrary test code T is input to the output circuit unit 105 by switching to the side of the test code T in the selector unit 104 shown in FIG. 10. In this case, a tester must set this adjustment code C to a value obtained by increasing or decreasing an arbitrary number of steps while previously taking into consideration an adjustment code C corresponding to the standard value of the output impedance of the output circuit unit 105. For example, a case is considered where the tester assumes a characteristic Ca shown in FIG. 11 regarding the relationship between the output impedance and the adjustment code C. Note that although the output impedance varies in a step-like manner, in practice, relative to the adjustment code C having a predetermined number of bits, this variation is represented by a curve in FIG. 11 for simplicity.
In the assumed characteristic Ca, the tester can set a test range having an upper limit Cx+Cy and a lower limit Cx−Cy, which are obtained by increasing or decreasing a predetermined number of steps Cy from a starting point which is an adjustment code Cx corresponding to a target value Rx of the output impedance. However, the relationship between the actual value of the output impedance and the adjustment code C varies depending on a variety of conditions (temperature, supply voltage, process variation, and the like) and therefore is difficult to determine uniformly. Accordingly, it is conceivable that in FIG. 11, the relationship changes from the assumed characteristic Ca to a characteristic Cb as the output impedance varies upward, or to a characteristic Cc as the output impedance varies downward. For these characteristics Cb and Cc, the output impedance at the adjustment code Cx of the starting point deviates from the target value Rx, and the test range is no longer appropriate. If the tester desires to correctly set the test range corresponding to the target value Rx, then the tester must follow a complex procedure, in which, after performing an automatic adjustment using the output impedance adjustment circuit, the tester measures the adjustment code C at that time and determines the test range on the basis of the obtained adjustment code C. In this manner, the conventional output impedance adjustment circuit poses a problem that, when performing tests under a variety of conditions, it is difficult to set a test range using an adjustment code precisely corresponding to the target value of the output impedance.